ИСТИНА

A prototype readout channel was manufactured in UMC CMOS 180 nm for the purpose of the CBM xperiment at the FAIR accelerator. The channel includes a preamplifier with fast and slow CR-RC shapers, discriminator with a differential threshold setup circuit, 6 bit SAR ADC (40 Msps, 1.5mW power consumption), digital peak detector and block of the time stamp registration. The control data,clock and output data are supplied through SLVS transmitter and receiver. The slow and fast channels have 1500 el and 2000 el ENC accordingly at a 50 pF detector capacitance. Power consumption is 10 mW/channel.